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Interrupt and trap handling in an embedded multi-thread processor to avoid priority inversion and maintain real-time operation
Grant 7,774,585 - Ober , et al. August 10, 2 | 2010-08-10 |
Fixed length memory to memory arithmetic and architecture for direct memory access using fixed length instructions
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Program tracing in a multithreaded processor
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Thread ID in a multithreaded processor
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Variable length instruction pipeline
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Zero-overhead loop operation in microprocessor having instruction buffer
Grant 7,159,103 - Ahmad , et al. January 2, 2 | 2007-01-02 |
Controlling out of order execution pipelines using pipeline skew parameters
App 20060259742 - Norden; Erik K. ; et al. | 2006-11-16 |
Multi-threaded embedded processor using deterministic instruction memory to guarantee execution of pre-selected threads during blocking events
Grant 7,062,606 - Ober , et al. June 13, 2 | 2006-06-13 |
Fixed length memory to memory arithmetic and architecture for a communications embedded processor system
Grant 7,047,396 - Fotland , et al. May 16, 2 | 2006-05-16 |
Thread selection unit and method to fairly allocate processor cycles in a block multithreaded processor
App 20050198475 - Arnold, Roger D. ; et al. | 2005-09-08 |
Program tracing in a multithreaded processor
App 20050177819 - Ober, Robert E. ; et al. | 2005-08-11 |
Variable length instruction pipeline
App 20050149699 - Norden, Erik K. ; et al. | 2005-07-07 |
Machine instruction for enhanced control of multiple virtual processor systems
App 20050108711 - Arnold, Roger D. ; et al. | 2005-05-19 |
Interrupt and trap handling in an embedded multi-thread processor to avoid priority inversion and maintain real-time operation
App 20050102458 - Ober, Robert E. ; et al. | 2005-05-12 |
Variable length instruction pipeline
Grant 6,859,873 - Norden , et al. February 22, 2 | 2005-02-22 |
Zero-overhead loop operation in microprocessor having instruction buffer
App 20040193858 - Ahmad, Sagheer ; et al. | 2004-09-30 |
Multi-threaded embedded processor using deterministic instruction memory to guarantee execution of pre-selected threads during blocking events
App 20040088488 - Ober, Robert E. ; et al. | 2004-05-06 |
Variable length instruction pipeline
App 20020199085 - Norden, Erik K. ; et al. | 2002-12-26 |
Data processing unit with interface for sharing registers by a processor and a coprocessor
Grant 6,434,689 - Fleck , et al. August 13, 2 | 2002-08-13 |
Apparatus with context switching capability
Grant 6,378,065 - Arnold , et al. April 23, 2 | 2002-04-23 |
Data Processing Unit With Interface For Sharing Registers By A Processor And A Coprocessor
App 20010042193 - FLECK, ROD G. ; et al. | 2001-11-15 |
Data processing unit with debug capabilities using a memory protection unit
Grant 6,175,913 - Chesters , et al. January 16, 2 | 2001-01-16 |
Data processing unit with hardware assisted context switching capability
Grant 6,128,641 - Fleck , et al. October 3, 2 | 2000-10-03 |
Apparatus for read/write-access to registers having register file architecture in a central processing unit
Grant 6,041,387 - Fleck , et al. March 21, 2 | 2000-03-21 |
Patient support frame for posterior lumbar laminectomy
Grant 4,583,725 - Arnold April 22, 1 | 1986-04-22 |
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