Ariizumi; Shoji

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ariizumi; Shoji.The latest application filed is for "semiconductor memory device and method of manufacturing it".

Company Profile

0.18.0

Ariizumi; Shoji - Tokyo JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor memory device and method of manufacturing it Grant 5,101,262 - Ariizumi , et al. March 31, 1	1992-03-31
Method of making a semiconductor ROM device Grant 4,855,248 - Ariizumi , et al. August 8, 1	1989-08-08
Random access memory with resistance to crystal lattice memory errors Grant 4,760,560 - Ariizumi , et al. July 26, 1	1988-07-26
Semiconductor read only memory device with selectively present mask layer Grant 4,755,864 - Ariizumi July 5, 1	1988-07-05
Read only memory Grant 4,748,492 - Iwase , et al. May 31, 1	1988-05-31
Semiconductor device having multiple conductive layers and the method of manufacturing the semiconductor device Grant 4,673,969 - Ariizumi , et al. June 16, 1	1987-06-16
Read only semiconductor memory device with polysilicon drain extensions Grant 4,649,412 - Iwase , et al. March 10, 1	1987-03-10
Redundancy circuit for a semiconductor memory device Grant 4,648,075 - Segawa , et al. March 3, 1	1987-03-03
Inverter circuit provided with gate protection Grant 4,578,694 - Ariizumi , et al. March 25, 1	1986-03-25
Semiconductor memory device Grant 4,571,706 - Iwahashi , et al. February 18, 1	1986-02-18
Static memory having load polysilicon resistors formed over driver FET drains Grant 4,541,006 - Ariizumi , et al. September 10, 1	1985-09-10
Charge pump substrate bias with antiparasitic guard ring Grant 4,539,490 - Ariizumi , et al. September 3, 1	1985-09-03
Semiconductor memory device Grant 4,535,426 - Ariizumi , et al. August 13, 1	1985-08-13
Semiconductor integrated circuit device with circuits for protecting an input section against an external surge Grant 4,527,213 - Ariizumi July 2, 1	1985-07-02
MOS Static RAM layout with polysilicon resistors over FET gates Grant 4,453,175 - Ariizumi , et al. June 5, 1	1984-06-05
Method of producing semiconductor devices Grant 4,413,403 - Ariizumi November 8, 1	1983-11-08
MOS Transistor circuit with a power-down function Grant 4,384,220 - Segawa , et al. May 17, 1	1983-05-17
Electrically alterable nonvolatile memory Grant 4,247,918 - Iwahashi , et al. January 27, 1	1981-01-27

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