Andrews, JR.; Lawrence Douglas
Patent Applications and Registrations
Patent applications and USPTO patent grants for Andrews, JR.; Lawrence Douglas.The latest application filed is for "support mounted electrically interconnected die assembly".
- Andrews, JR.; Lawrence Douglas - Scotts Valley CA
- Andrews, Jr.; Lawrence Douglas - Los Gatos CA US
- Andrews, Jr.; Lawrence Douglas - Soquel CA
| Patent | Date |
|---|---|
| Support Mounted Electrically Interconnected Die Assembly App 20160218088 - McElrea; Simon J. S. ; et al. | 2016-07-28 |
| Support mounted electrically interconnected die assembly Grant 9,305,862 - McElrea , et al. April 5, 2 | 2016-04-05 |
| Vertical electrical interconnect formed on support prior to die mount Grant 8,742,602 - Caskey , et al. June 3, 2 | 2014-06-03 |
| Electrically interconnected stacked die assemblies Grant 8,723,332 - McElrea , et al. May 13, 2 | 2014-05-13 |
| Electrically interconnected stacked die assemblies Grant 8,629,543 - McElrea , et al. January 14, 2 | 2014-01-14 |
| Support mounted electrically interconnected die assembly App 20130099392 - McElrea; Simon J. S. ; et al. | 2013-04-25 |
| Wafer level surface passivation of stackable integrated circuit chips Grant 8,324,081 - McElrea , et al. December 4, 2 | 2012-12-04 |
| Support mounted electrically interconnected die assembly Grant 8,178,978 - McElrea , et al. May 15, 2 | 2012-05-15 |
| Flat leadless packages and stacked leadless package assemblies Grant 8,159,053 - Andrews, Jr. , et al. April 17, 2 | 2012-04-17 |
| Wafer Level Surface Passivation Of Stackable Integrated Circuit Chips App 20110147943 - McElrea; Simon J. S. ; et al. | 2011-06-23 |
| Wafer level surface passivation of stackable integrated circuit chips Grant 7,923,349 - McElrea , et al. April 12, 2 | 2011-04-12 |
| Electrically Interconnected Stacked Die Assemblies App 20110037159 - McElrea; Simon J. S. ; et al. | 2011-02-17 |
| Flat Leadless Packages and Stacked Leadless Package Assemblies App 20110012246 - Andrews, JR.; Lawrence Douglas ; et al. | 2011-01-20 |
| Flat leadless packages and stacked leadless package assemblies Grant 7,843,046 - Andrews, Jr. , et al. November 30, 2 | 2010-11-30 |
| Support Mounted Electrically Interconnected Die Assembly App 20090230528 - McElrea; Simon J. S. ; et al. | 2009-09-17 |
| Flat Leadless Packages And Stacked Leadless Package Assemblies App 20090206458 - ANDREWS, JR.; LAWRENCE DOUGLAS ; et al. | 2009-08-20 |
| Chip Scale Stacked Die Package App 20090102038 - MCELREA; SIMON J.S. ; et al. | 2009-04-23 |
| Electrical Interconnect Formed by Pulsed Dispense App 20090068790 - Caskey; Terrence ; et al. | 2009-03-12 |
| Wafer Level Surface Passivation Of Stackable Integrated Circuit Chips App 20080315434 - McElrea; Simon J.S. ; et al. | 2008-12-25 |
| Three-dimensional Circuitry Formed On Integrated Circuit Device Using Two-dimensional Fabrication App 20080315407 - Andrews, JR.; Lawrence Douglas ; et al. | 2008-12-25 |
| Electrically Interconnected Stacked Die Assemblies App 20080303131 - McElrea; Simon J.S. ; et al. | 2008-12-11 |
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