Andre; Thomas W.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Andre; Thomas W..The latest application filed is for "data-masked analog and digital read for resistive memories".
Company Profile
0.28.20
- Andre; Thomas W. - Austin TX
- Andre; Thomas W - Austin TX
Patent Activity
| Patent | Date |
|---|---|
| Data-masked analog and digital read for resistive memories Grant 9,047,967 - Alam , et al. June 2, 2 | 2015-06-02 |
| Data-masked Analog And Digital Read For Resistive Memories App 20150003145 - Alam; Syed M. ; et al. | 2015-01-01 |
| Random access memory architecture including midpoint reference Grant 8,184,476 - Nahas , et al. May 22, 2 | 2012-05-22 |
| Random access memory architecture including midpoint reference App 20100165710 - NAHAS; Joseph J. ; et al. | 2010-07-01 |
| Methods and apparatus for a memory device with self-healing reference bits Grant 7,747,926 - Wise , et al. June 29, 2 | 2010-06-29 |
| Non-volatile memory cell and methods thereof Grant 7,697,321 - Andre April 13, 2 | 2010-04-13 |
| Toggle memory burst Grant 7,543,211 - Nahas , et al. June 2, 2 | 2009-06-02 |
| Antifuse circuit and method for selectively programming thereof Grant 7,532,533 - Andre , et al. May 12, 2 | 2009-05-12 |
| Non-volatile memory cell and methods thereof App 20070268741 - Andre; Thomas W. | 2007-11-22 |
| Methods and apparatus for a memory device with self-healing reference bits App 20070260962 - Wise; Loren J. ; et al. | 2007-11-08 |
| Sense amplifier with multiple bits sharing a common reference Grant 7,292,484 - Andre , et al. November 6, 2 | 2007-11-06 |
| Mram Array With Reference Cell Row And Methof Of Operation App 20070247939 - Nahas; Joseph J. ; et al. | 2007-10-25 |
| Antifuse Circuit App 20070188190 - Andre; Thomas W. ; et al. | 2007-08-16 |
| Antifuse circuit Grant 7,224,630 - Andre , et al. May 29, 2 | 2007-05-29 |
| MRAM memory with residual write field reset Grant 7,206,223 - Nahas , et al. April 17, 2 | 2007-04-17 |
| Antifuse circuit App 20060291315 - Andre; Thomas W. ; et al. | 2006-12-28 |
| MRAM architecture with electrically isolated read and write circuitry Grant 7,154,772 - Nahas , et al. December 26, 2 | 2006-12-26 |
| Toggle memory burst App 20060174172 - Nahas; Joseph J. ; et al. | 2006-08-03 |
| MRAM architecture with electrically isolated read and write circuitry App 20050152183 - Nahas, Joseph J. ; et al. | 2005-07-14 |
| MRAM and methods for reading the MRAM Grant 6,909,631 - Durlam , et al. June 21, 2 | 2005-06-21 |
| MRAM architecture with electrically isolated read and write circuitry Grant 6,903,964 - Nahas , et al. June 7, 2 | 2005-06-07 |
| Accelerated life test of MRAM cells Grant 6,894,937 - Garni , et al. May 17, 2 | 2005-05-17 |
| MRAM architecture Grant 6,888,743 - Durlam , et al. May 3, 2 | 2005-05-03 |
| Accelerated Life Test Of Mram Cells App 20050068815 - Garni, Bradley J. ; et al. | 2005-03-31 |
| Circuit For Write Field Disturbance Cancellation In An Mram And Method Of Operation App 20050052901 - Nahas, Joseph J. ; et al. | 2005-03-10 |
| Circuit for write field disturbance cancellation in an MRAM and method of operation Grant 6,859,388 - Nahas , et al. February 22, 2 | 2005-02-22 |
| Write driver for a magnetoresistive memory Grant 6,842,365 - Nahas , et al. January 11, 2 | 2005-01-11 |
| Sense amplifier and method for performing a read operation in a MRAM Grant 6,760,266 - Garni , et al. July 6, 2 | 2004-07-06 |
| MRAM architecture App 20040125646 - Durlam, Mark A. ; et al. | 2004-07-01 |
| MRAM and methods for reading the MRAM App 20040125649 - Durlam, Mark A. ; et al. | 2004-07-01 |
| Circuit and method for reading a toggle memory cell Grant 6,744,663 - Garni , et al. June 1, 2 | 2004-06-01 |
| Memory architecture with write circuitry and method therefor Grant 6,714,440 - Subramanian , et al. March 30, 2 | 2004-03-30 |
| Memory having a precharge circuit and method therefor Grant 6,711,052 - Subramanian , et al. March 23, 2 | 2004-03-23 |
| Balanced load memory and method of operation Grant 6,711,068 - Subramanian , et al. March 23, 2 | 2004-03-23 |
| Sense amplifier bias circuit for a memory having at least two distinct resistance states Grant 6,700,814 - Nahas , et al. March 2, 2 | 2004-03-02 |
| Circuit and method of writing a toggle memory Grant 6,693,824 - Nahas , et al. February 17, 2 | 2004-02-17 |
| Circuit and method for reading a toggle memory cell App 20040008536 - Garni, Bradley J. ; et al. | 2004-01-15 |
| Memory having a precharge circuit and method therefor App 20040001351 - Subramanian, Chitra K. ; et al. | 2004-01-01 |
| Sense amplifier and method for performing a read operation in a MRAM App 20040001383 - Garni, Bradley J. ; et al. | 2004-01-01 |
| Memory architecture with write circuitry and method therefor App 20040001360 - Subramanian, Chitra K. ; et al. | 2004-01-01 |
| Balanced Load Memory And Method Of Operation App 20040001361 - Subramanian, Chitra K. ; et al. | 2004-01-01 |
| Circuit And Method Of Writing A Toggle Memory App 20040001352 - Nahas, Joseph J. ; et al. | 2004-01-01 |
| MRAM architecture with electrically isolated read and write circuitry App 20040001358 - Nahas, Joseph J. ; et al. | 2004-01-01 |
| Magnetic memory and method of bi-directional write current programming Grant 6,667,899 - Subramanian , et al. December 23, 2 | 2003-12-23 |
| Memory having write current ramp rate control Grant 6,657,889 - Subramanian , et al. December 2, 2 | 2003-12-02 |
| Sense amplifier incorporating a symmetric midpoint reference Grant 6,621,729 - Garni , et al. September 16, 2 | 2003-09-16 |
| Sense amplifier for a memory having at least two distinct resistance states Grant 6,600,690 - Nahas , et al. July 29, 2 | 2003-07-29 |
| Method and circuitry for identifying weak bits in an MRAM Grant 6,538,940 - Nahas , et al. March 25, 2 | 2003-03-25 |
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