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Patent applications and USPTO patent grants for Anderson; Janeen D. W..The latest application filed is for "two layer neural network comprised of neurons with improved input range and input offset".
Patent | Date |
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Two layer neural network comprised of neurons with improved input range and input offset Grant 5,381,515 - Platt , et al. * January 10, 1 | 1995-01-10 |
Electrically adaptable neural network with post-processing circuitry Grant 5,331,215 - Allen , et al. * July 19, 1 | 1994-07-19 |
Continuous synaptic weight update mechanism Grant 5,303,329 - Mead , et al. April 12, 1 | 1994-04-12 |
Writable analog reference voltage storage device Grant 5,243,554 - Allen , et al. September 7, 1 | 1993-09-07 |
Synaptic element including weight-storage and weight-adjustment circuit Grant 5,204,549 - Platt , et al. April 20, 1 | 1993-04-20 |
Writable analog reference voltage storage device Grant 5,166,562 - Allen , et al. November 24, 1 | 1992-11-24 |
Adaptable MOS current mirror Grant 5,160,899 - Anderson , et al. November 3, 1 | 1992-11-03 |
CMOS winner-take all circuit with offset adaptation Grant 5,146,106 - Anderson , et al. September 8, 1 | 1992-09-08 |
Synaptic element and array Grant 5,120,996 - Mead , et al. June 9, 1 | 1992-06-09 |
CMOS current mirror with offset adaptation Grant 5,119,038 - Anderson , et al. June 2, 1 | 1992-06-02 |
Synaptic element and array Grant 5,083,044 - Mead , et al. January 21, 1 | 1992-01-21 |
CMOS amplifier with offset adaptation Grant 5,059,920 - Anderson , et al. October 22, 1 | 1991-10-22 |
MOS device for long-term learning Grant 4,953,928 - Anderson , et al. September 4, 1 | 1990-09-04 |
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