| Patent | Date |
|---|
Schottky diode having limited area self-aligned guard ring and method for making same
Grant 4,796,069 - Anantha , et al. January 3, 1 | 1989-01-03 |
Method for making Schottky diode having limited area self-aligned guard ring
Grant 4,691,435 - Anantha , et al. September 8, 1 | 1987-09-08 |
Fabrication methods for high performance lateral bipolar transistors
Grant 4,583,106 - Anantha , et al. April 15, 1 | 1986-04-15 |
Fabrication methods for high performance lateral bipolar transistors
Grant 4,546,536 - Anantha , et al. October 15, 1 | 1985-10-15 |
Method of fabricating a lateral PNP transistor
Grant 4,510,676 - Anantha , et al. April 16, 1 | 1985-04-16 |
High density memory cell
Grant 4,427,989 - Anantha , et al. January 24, 1 | 1984-01-24 |
Method of planarizing silicon dioxide in semiconductor devices
Grant 4,389,281 - Anantha , et al. June 21, 1 | 1983-06-21 |
Method for avoiding residue on a vertical walled mesa
Grant 4,389,294 - Anantha , et al. June 21, 1 | 1983-06-21 |
Method for making a high sheet resistance structure for high density integrated circuits
Grant 4,316,319 - Anantha , et al. February 23, 1 | 1982-02-23 |
Selective epitaxy method using laser annealing for making filamentary transistors
Grant 4,269,631 - Anantha , et al. May 26, 1 | 1981-05-26 |
Self aligned method for making bipolar transistor having minimum base to emitter contact spacing
Grant 4,252,582 - Anantha , et al. February 24, 1 | 1981-02-24 |
Selective epitaxy method for making filamentary pedestal transistor
Grant 4,252,581 - Anantha , et al. February 24, 1 | 1981-02-24 |
High performance bipolar device and method for making same
Grant 4,236,294 - Anantha , et al. December 2, 1 | 1980-12-02 |
Integrated circuit interconnection structure having precision terminating resistors
Grant 4,228,369 - Anantha , et al. October 14, 1 | 1980-10-14 |
Buried high sheet resistance structure for high density integrated circuits with reach through contacts
Grant 4,228,450 - Anantha , et al. October 14, 1 | 1980-10-14 |
Method for fabricating vertical NPN and PNP structures and the resulting product
Grant 4,214,315 - Anantha , et al. July 22, 1 | 1980-07-22 |
High performance bipolar device and method for making same
Grant 4,160,991 - Anantha , et al. July 10, 1 | 1979-07-10 |
Method for fabrication vertical NPN and PNP structures utilizing ion-implantation
Grant 4,159,915 - Anantha , et al. July 3, 1 | 1979-07-03 |
Charge coupled device memory with method of doubled storage capacity and independent of process parameters and temperature
Grant 4,139,910 - Anantha , et al. February 13, 1 | 1979-02-13 |
Schottky barrier diode having chargeable floating gate
Grant T953,005 - Anantha , et al. December 7, 1 | 1976-12-07 |
| 