Patent | Date |
---|
Content addressable memory with reduced power consumption and increased search operation speed Grant 9,620,214 - Watanabe , et al. April 11, 2 | 2017-04-11 |
Content Addressable Memory App 20150228341 - WATANABE; Naoya ;   et al. | 2015-08-13 |
Content addressable memory Grant 9,042,148 - Watanabe , et al. May 26, 2 | 2015-05-26 |
Content Addressable Memory App 20140126264 - WATANABE; Naoya ;   et al. | 2014-05-08 |
Content addressable memory Grant 8,638,583 - Watanabe , et al. January 28, 2 | 2014-01-28 |
Content Addressable Memory App 20130010513 - WATANABE; Naoya ;   et al. | 2013-01-10 |
Content addressable memory Grant 8,310,852 - Watanabe , et al. November 13, 2 | 2012-11-13 |
Content Addressable Memory App 20120170344 - WATANABE; Naoya ;   et al. | 2012-07-05 |
Content addressable memory Grant 8,164,934 - Watanabe , et al. April 24, 2 | 2012-04-24 |
Content Addressable Memory App 20100165691 - WATANABE; Naoya ;   et al. | 2010-07-01 |
Content addressable memory App 20070247885 - Watanabe; Naoya ;   et al. | 2007-10-25 |
Semiconductor memory device with efficiently laid-out internal interconnection lines Grant 6,756,652 - Yano , et al. June 29, 2 | 2004-06-29 |
Semiconductor Memory Device With Efficiently Laid-out Internal Interconnection Lines App 20040089913 - Yano, Kenji ;   et al. | 2004-05-13 |
Semiconductor memory device App 20020118584 - Amano, Teruhiko | 2002-08-29 |
Semiconductor memory device having internal data read circuit excellent in noise immunity App 20020075731 - Amano, Teruhiko | 2002-06-20 |
Semiconductor Memory Device Capable Of Performing Stable Operation For Noise While Preventing Increase In Chip Area App 20010045583 - MORISHITA, FUKASHI ;   et al. | 2001-11-29 |
Semiconductor memory device Grant 6,272,034 - Kinoshita , et al. August 7, 2 | 2001-08-07 |
High speed operable semiconductor memory device with memory blocks arranged about the center Grant 6,215,720 - Amano , et al. April 10, 2 | 2001-04-10 |
High speed operable semiconductor memory device with memory blocks arranged about the center Grant 6,072,743 - Amano , et al. June 6, 2 | 2000-06-06 |
Multi-bank clock synchronous type semiconductor memory device having improved memory array and power supply arrangement Grant 6,064,621 - Tanizaki , et al. May 16, 2 | 2000-05-16 |
Semiconductor memory device capable of increasing chip yields while maintaining rapid operation Grant 5,914,907 - Kobayashi , et al. June 22, 1 | 1999-06-22 |
Semiconductor memory device having hierarchy control circuit architecture of master/local control circuits permitting high speed accessing Grant 5,894,448 - Amano , et al. April 13, 1 | 1999-04-13 |