Amanapu; Hari Prasad

Patent Applications and Registrations

Patent applications and USPTO patent grants for Amanapu; Hari Prasad.The latest application filed is for "planarization stop region for use with low pattern density interconnects".

Company Profile

16.9.12

Amanapu; Hari Prasad - Guilderland NY
Amanapu; Hari Prasad - Albuquerque NM

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Middle-of-line contacts with varying contact area providing reduced contact resistance Grant 11,127,825 - Park , et al. September 21, 2	2021-09-21
Planarization Stop Region For Use With Low Pattern Density Interconnects App 20210242077 - Peethala; Cornelius Brown ; et al.	2021-08-05
Planarization of dielectric topography and stopping in dielectric Grant 11,037,795 - Amanapu , et al. June 15, 2	2021-06-15
Non-self aligned contact semiconductor devices Grant 11,024,720 - Xie , et al. June 1, 2	2021-06-01
Hybrid Metallization And Dielectric Interconnects In Top Via Configuration App 20210143061 - AMANAPU; Hari Prasad ; et al.	2021-05-13
Skip via for metal interconnects Grant 10,978,388 - Amanapu , et al. April 13, 2	2021-04-13
Robust gate cap for protecting a gate from downstream metallization etch operations Grant 10,916,431 - Patlolla , et al. February 9, 2	2021-02-09
Planarization of Dielectric Topography and Stopping in Dielectric App 20210035813 - Amanapu; Hari Prasad ; et al.	2021-02-04
Low-resistance Top Contact On Vtfet App 20210005735 - Waskiewicz; Christopher J. ; et al.	2021-01-07
Low-resistance top contact on VTFET Grant 10,833,173 - Waskiewicz , et al. November 10, 2	2020-11-10
Bottom electrode and dielectric structure for MRAM applications Grant 10,833,122 - Amanapu , et al. November 10, 2	2020-11-10
Recessed interconnet line having a low-oxygen cap for facilitating a robust planarization process and protecting the interconnect line from downstream etch operations Grant 10,832,946 - Choi , et al. November 10, 2	2020-11-10
Recessed Interconnet Line Having A Low-oxygen Cap For Facilitating A Robust Planarization Process And Protecting The Interconnect Line From Downstream Etch Operations App 20200343131 - Choi; Samuel Sung, Shik ; et al.	2020-10-29
Metal interconnect structures with self-forming sidewall barrier layer Grant 10,818,589 - Amanapu , et al. October 27, 2	2020-10-27
Robust Gate Cap For Protecting A Gate From Downstream Metallization Etch Operations App 20200335345 - Patlolla; Raghuveer Reddy ; et al.	2020-10-22
Middle-of-line Contacts With Varying Contact Area Providing Reduced Contact Resistance App 20200303264 - Park; Chanro ; et al.	2020-09-24
Non-self Aligned Contact Semiconductor Devices App 20200295151 - Xie; Ruilong ; et al.	2020-09-17
Metal Interconnect Structures with Self-Forming Sidewall Barrier Layer App 20200294911 - Amanapu; Hari Prasad ; et al.	2020-09-17
Bottom Electrode And Dielectric Structure For Mram Applications App 20200219931 - Amanapu; Hari Prasad ; et al.	2020-07-09
Skip Via For Metal Interconnects App 20200111736 - Amanapu; Hari Prasad ; et al.	2020-04-09
Low-resistance Top Contact On Vtfet App 20200075746 - Waskiewicz; Christopher J. ; et al.	2020-03-05

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.