loadpatents
name:-0.00047421455383301
name:-0.020379066467285
name:-0.0015571117401123
Alpert; Donald B. Patent Filings

Alpert; Donald B.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Alpert; Donald B..The latest application filed is for "adaptive computing ensemble microprocessor architecture".

Company Profile
0.17.0
  • Alpert; Donald B. - Phoenix AZ
  • Alpert; Donald B. - Santa Clara CA
  • Alpert; Donald B. - Herzlia IL
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Adaptive computing ensemble microprocessor architecture
Grant 7,389,403 - Alpert , et al. June 17, 2
2008-06-17
Apparatus and method for identifying the features and the origin of a computer microprocessor
Grant 5,958,037 - Dreyer , et al. September 28, 1
1999-09-28
Physical address size selection and page size selection in an address translator
Grant 5,802,605 - Alpert , et al. September 1, 1
1998-09-01
Method for verifying the correct processing of pipelined instructions including branch instructions and self-modifying code in a microprocessor
Grant 5,692,167 - Grochowski , et al. November 25, 1
1997-11-25
Apparatus and method for identifying a computer microprocessor
Grant 5,675,825 - Dreyer , et al. October 7, 1
1997-10-07
Partially decoded instruction cache
Grant 5,669,011 - Alpert , et al. September 16, 1
1997-09-16
Apparatus for monitoring the performance of a microprocessor
Grant 5,657,253 - Dreyer , et al. August 12, 1
1997-08-12
Processor capable of executing programs that contain RISC and CISC instructions
Grant 5,638,525 - Hammond , et al. June 10, 1
1997-06-10
Physical address size selection and page size selection in an address translator
Grant 5,617,554 - Alpert , et al. April 1, 1
1997-04-01
Branch prediction and resolution apparatus for a superscalar computer processor
Grant 5,606,676 - Grochowski , et al. February 25, 1
1997-02-25
Apparatus and method for storing partially-decoded instructions in the instruction cache of a CPU having multiple execution units
Grant 5,481,751 - Alpert , et al. January 2, 1
1996-01-02
Microprocessor with an external command mode for diagnosis and debugging
Grant 5,479,652 - Dreyer , et al. December 26, 1
1995-12-26
Microprocessor with apparatus for parallel execution of instructions
Grant 5,475,824 - Grochowski , et al. December 12, 1
1995-12-12
Branch prediction and resolution apparatus for a superscalar computer processor
Grant 5,442,756 - Grochowski , et al. August 15, 1
1995-08-15
Method and apparatus for dependency checking in a multi-pipelined microprocessor
Grant 5,416,913 - Grochowski , et al. May 16, 1
1995-05-16
Selectively locking memory locations within a microprocessor's on-chip cache
Grant 5,249,286 - Alpert , et al. September 28, 1
1993-09-28
Apparatus and method for detecting and handling memory-mapped I/O by a pipelined microprocessor
Grant 4,802,085 - Levy , et al. January 31, 1
1989-01-31

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