Aloni; Efraim

Patent Applications and Registrations

Patent applications and USPTO patent grants for Aloni; Efraim.The latest application filed is for "method for fabricating capacitor structures using the first contact metal".

Company Profile

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Aloni; Efraim - Migdal Haemek IL
Aloni; Efraim - Haifa IL

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for fabricating capacitor structures using the first contact metal Grant 7,754,559 - Aloni , et al. July 13, 2	2010-07-13
Single poly CMOS logic memory cell for RFID application and its programming and erasing method Grant 7,700,994 - Roizin , et al. April 20, 2	2010-04-20
Method For Fabricating Capacitor Structures Using The First Contact Metal App 20090239351 - Aloni; Efraim ; et al.	2009-09-24
Protection against in-process charging in silicon-oxide-nitride-oxide-silicon (SONOS) memories Grant 7,439,575 - Roizin , et al. October 21, 2	2008-10-21
Single Poly CMOS Logic Memory Cell For RFID Application And Its Programming And Erasing Method App 20080137408 - Roizin; Yakov ; et al.	2008-06-12
Method of decreasing charging effects in oxide-nitride-oxide (ONO) memory arrays Grant 7,060,627 - Gutman , et al. June 13, 2	2006-06-13
Protection against in-process charging in silicon-oxide-nitride-oxide-silicon (SONOS) memories Grant 6,959,920 - Roizin , et al. November 1, 2	2005-11-01
Protection againts in-process charging in silicon-oxide-nitride-oxide-sili- con (SONOS) memories App 20050139903 - Roizin, Yakov ; et al.	2005-06-30
Method of decreasing charging effects in oxide-nitride-oxide (ONO) memory arrays App 20050054161 - Gutman, Micha ; et al.	2005-03-10
Protection against in-process charging in silicon-oxide-nitride-oxide-sili- con (SONOS) memories App 20050051838 - Roizin, Yakov ; et al.	2005-03-10
Self-aligned process for fabricating memory cells with two isolated floating gates Grant 6,703,298 - Roizin , et al. March 9, 2	2004-03-09
Semiconductor chip having both polycide and salicide gates and methods for making same Grant 6,686,276 - Edrei , et al. February 3, 2	2004-02-03
Self-aligned process for fabricating memory cells with two isolated floating gates App 20030218204 - Roizin, Yakov ; et al.	2003-11-27
Semiconductor chip having both polycide and salicide gates and methods for making same App 20030001220 - Edrei, Itzhak ; et al.	2003-01-02
Methods for fabricating a semiconductor chip having CMOS devices and a fieldless array Grant 6,346,442 - Aloni , et al. February 12, 2	2002-02-12
Methods for fabricating a semiconductor chip having CMOS devices and fieldless array App 20020016081 - Aloni, Efraim ; et al.	2002-02-07

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