Allman; Derryl D. J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Allman; Derryl D. J..The latest application filed is for "method for redirecting void diffusion away from vias in an integrated circuit design".

Company Profile

0.53.19

Allman; Derryl D. J. - Camas WA
Allman; Derryl D. J. - Cames WA
Allman; Derryl D. J. - Colorado Springs CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Nanotube fuse structure Grant 7,598,127 - Whitefield , et al. October 6, 2	2009-10-06
Method for redirecting void diffusion away from vias in an integrated circuit design Grant 7,582,566 - Allman , et al. September 1, 2	2009-09-01
Method and apparatus for diverting void diffusion in integrated circuit conductors Grant 7,436,040 - Allman , et al. October 14, 2	2008-10-14
Integrated circuit with inductor having horizontal magnetic flux lines Grant 7,384,801 - Bhatt , et al. June 10, 2	2008-06-10
Method For Redirecting Void Diffusion Away From Vias In An Integrated Circuit Design App 20080132065 - Allman; Derryl D. J. ; et al.	2008-06-05
Method and apparatus for redirecting void diffusion away from vias in an integrated circuit design Grant 7,361,965 - Allman , et al. April 22, 2	2008-04-22
Method and apparatus for diverting void diffusion in integrated circuit conductors App 20070259518 - Allman; Derryl D.J. ; et al.	2007-11-08
Integrated circuit with inductor having horizontal magnetic flux lines App 20070254448 - Bhatt; Hemanshu D. ; et al.	2007-11-01
Integrated circuit with inductor having horizontal magnetic flux lines Grant 7,253,497 - Bhatt , et al. August 7, 2	2007-08-07
Method and apparatus for redirecting void diffusion away from vias in an integrated circuit design App 20070155160 - Allman; Derryl D. J. ; et al.	2007-07-05
Nanotube fuse structure App 20060258122 - Whitefield; Bruce J. ; et al.	2006-11-16
Method of forming a metal-insulator-metal capacitor in an interconnect cavity Grant 7,118,985 - Allman , et al. October 10, 2	2006-10-10
Local interconnect for integrated circuit Grant 7,081,379 - Hanson , et al. July 25, 2	2006-07-25
Bond pad design Grant 7,023,067 - Allman , et al. April 4, 2	2006-04-04
Extreme low-K interconnect structure and method App 20060006538 - Allman; Derryl D. J. ; et al.	2006-01-12
Capacitor with stoichiometrically adjusted dielectric and method of fabricating same Grant 6,951,787 - Allman , et al. October 4, 2	2005-10-04
Capacitor with stoichiometrically adjusted dielectric and method of fabricating same App 20050215005 - Allman, Derryl D. J. ; et al.	2005-09-29
Local interconnect Grant 6,927,494 - Allman , et al. August 9, 2	2005-08-09
Local interconnect for integrated circuit App 20050156196 - Hanson, Jeffrey F. ; et al.	2005-07-21
Plasma treatment system Grant 6,875,702 - Gu , et al. April 5, 2	2005-04-05
Local interconnect for integrated circuit Grant 6,872,612 - Hanson , et al. March 29, 2	2005-03-29
Integrated circuit with inductor having horizontal magnetic flux lines App 20050003562 - Bhatt, Hemanshu D. ; et al.	2005-01-06
On-chip graded index of refraction optical waveguide and damascene method of fabricating the same Grant 6,775,453 - Hornbeck , et al. August 10, 2	2004-08-10
Bond pad design App 20040135223 - Allman, Derryl D.J. ; et al.	2004-07-15
Bonding pad design App 20040089938 - Allman, Derryl D.J. ; et al.	2004-05-13
Method for forming a bonding pad on a substrate Grant 6,678,950 - Allman , et al. January 20, 2	2004-01-20
Thermal low k dielectrics Grant 6,654,226 - May , et al. November 25, 2	2003-11-25
Local interconnect App 20030186531 - Allman, Derryl D.J. ; et al.	2003-10-02
Thermal low k dielectrics App 20030170973 - May, Charles E. ; et al.	2003-09-11
Capacitor with stoichiometrically adjusted dielectric and method of fabricating same App 20030157765 - Allman, Derryl D.J. ; et al.	2003-08-21
Local interconnect for integrated circuit App 20030146456 - Hanson, Jeffrey F. ; et al.	2003-08-07
Capacitor with stoichiometrically adjusted dielectric and method of fabricating same Grant 6,566,186 - Allman , et al. May 20, 2	2003-05-20
Process for removal of resist mask over low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and removal of residues from via etch and resist mask removal Grant 6,562,700 - Gu , et al. May 13, 2	2003-05-13
Integrated circuit fabrication dual plasma process with separate introduction of different gases into gas flow App 20030068858 - Allman, Derryl D. J. ; et al.	2003-04-10
Apparatus and method for planarizing the surface of a semiconductor wafer Grant 6,541,383 - Allman , et al. April 1, 2	2003-04-01
Substrate planarization with a chemical mechanical polishing stop layer Grant 6,528,389 - Allman , et al. March 4, 2	2003-03-04
Interconnect-embedded metal-insulator-metal capacitor Grant 6,504,202 - Allman , et al. January 7, 2	2003-01-07
Plasma treatment system App 20020187643 - Gu, Shiqun ; et al.	2002-12-12
Interconnect-integrated metal-insulator-metal capacitor and method of fabricating same Grant 6,342,734 - Allman , et al. January 29, 2	2002-01-29
Capacitor with multiple-component dielectric and method of fabricating same Grant 6,341,056 - Allman , et al. January 22, 2	2002-01-22
On-chip single layer horizontal deflecting waveguide and damascene method of fabricating the same App 20010041027 - Hornbeck, Verne C. ; et al.	2001-11-15
Apparatus and method of planarizing a semiconductor wafer that includes a first reflective substance and a second reflective substance Grant 6,316,276 - Gregory , et al. November 13, 2	2001-11-13
Method and apparatus for detecting a planarized outer layer of a semiconductor wafer with a confocal optical system App 20010021622 - Allman, Derryl D.J. ; et al.	2001-09-13
Semiconductor wafer having a layer-to-layer alignment mark and method for fabricating the same Grant 6,288,454 - Allman , et al. September 11, 2	2001-09-11
Integrated circuit device and method of making the same using chemical mechanical polishing to remove material in two layers following masking Grant 6,284,586 - Seliskar , et al. September 4, 2	2001-09-04
Method and apparatus for detecting a polishing endpoint based upon infrared signals Grant 6,241,847 - Allman , et al. June 5, 2	2001-06-05
Tunable dielectric constant oxide and method of manufacture Grant 6,211,096 - Allman , et al. April 3, 2	2001-04-03
Method and apparatus for detecting a planarized outer layer of a semiconductor wafer with a confocal optical system Grant 6,201,253 - Allman , et al. March 13, 2	2001-03-13
Fabrication of metal-insulator-metal capacitive structures Grant 6,177,305 - Hornback , et al. January 23, 2	2001-01-23
Semiconductor wafer having a layer-to-layer alignment mark and method for fabricating the same Grant 6,136,662 - Allman , et al. October 24, 2	2000-10-24
Apparatus and method of detecting a polishing endpoint layer of a semiconductor wafer which includes a metallic reporting substance Grant 6,121,147 - Daniel , et al. September 19, 2	2000-09-19
Integrated circuit device having a capacitor with the dielectric peripheral region being greater than the dielectric central region Grant 6,115,233 - Seliskar , et al. September 5, 2	2000-09-05
Method and apparatus for detecting a polishing endpoint based upon heat conducted through a semiconductor wafer Grant 6,077,783 - Allman , et al. June 20, 2	2000-06-20
Method for tungsten nucleation from WF.sub.6 using titanium as a reducing agent Grant 5,963,828 - Allman , et al. October 5, 1	1999-10-05
Subsonic to supersonic and ultrasonic conditioning of a polishing pad in a chemical mechanical polishing apparatus Grant 5,868,608 - Allman , et al. February 9, 1	1999-02-09
Polishing composition for CMP operations Grant 5,861,055 - Allman , et al. January 19, 1	1999-01-19
Spin-on conductor process for integrated circuits Grant 5,728,626 - Allman , et al. March 17, 1	1998-03-17
Electronic device with a spin-on glass dielectric layer Grant 5,665,845 - Allman September 9, 1	1997-09-09
Method for polishing a wafer Grant 5,645,736 - Allman July 8, 1	1997-07-08
Method for manufacturing a monitor element Grant 5,576,224 - Yakura , et al. November 19, 1	1996-11-19
Electronic device with a spin-on glass dielectric layer Grant 5,527,872 - Allman June 18, 1	1996-06-18
Coating solution for forming glassy layers Grant 5,472,488 - Allman December 5, 1	1995-12-05
Structure and method for remotely measuring process data Grant 5,466,614 - Yakura , et al. November 14, 1	1995-11-14
Method for forming a bipolar transistor using doped SOG Grant 5,340,752 - Allman , et al. August 23, 1	1994-08-23
Method of making a shallow junction by using first and second SOG layers Grant 5,340,770 - Allman , et al. August 23, 1	1994-08-23
Method for forming a bipolar emitter using doped SOG Grant 5,322,805 - Allman , et al. June 21, 1	1994-06-21
Global planarization using SOG and CMP Grant 5,312,512 - Allman , et al. May 17, 1	1994-05-17
Selective sidewall diffusion process using doped SOG Grant 5,308,790 - Allman , et al. May 3, 1	1994-05-03
Coating solution for forming glassy layers Grant 5,302,198 - Allman * April 12, 1	1994-04-12
Spin-on glass composition Grant 5,152,834 - Allman October 6, 1	1992-10-06
Silica-based anti-reflective planarizing layer Grant 5,100,503 - Allman , et al. March 31, 1	1992-03-31
Native oxide reduction for sealing nitride deposition Grant 4,855,258 - Allman , et al. August 8, 1	1989-08-08

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