| Patent | Date |
|---|
Semiconductor device, and method and apparatus for manufacturing semiconductor device
Grant 7,262,480 - Kyogoku , et al. August 28, 2 | 2007-08-28 |
Semiconductor device and method of the semiconductor device
Grant 6,912,172 - Honma , et al. June 28, 2 | 2005-06-28 |
Semiconductor memory module having double-sided stacked memory chip layout
Grant 6,693,346 - Masayuki , et al. February 17, 2 | 2004-02-17 |
Semiconductor device and a method of manufacturing the same
Grant 6,686,663 - Masuda , et al. February 3, 2 | 2004-02-03 |
Semiconductor device and manufacture method of that
Grant 6,670,220 - Sakuraba , et al. December 30, 2 | 2003-12-30 |
Semiconductor device in which a chip is supplied either a first voltage or a second voltage
Grant 6,667,928 - Honma , et al. December 23, 2 | 2003-12-23 |
Mobile object combination detection apparatus and method
Grant 6,654,481 - Amemiya , et al. November 25, 2 | 2003-11-25 |
Semiconductor wafer, semiconductor chip, semiconductor device and method for manufacturing semiconductor device
Grant 6,649,931 - Honma , et al. November 18, 2 | 2003-11-18 |
Semiconductor device and its manufacturing method
Grant 6,639,323 - Akiyama , et al. October 28, 2 | 2003-10-28 |
Semiconductor device
Grant 6,617,196 - Iwaya , et al. September 9, 2 | 2003-09-09 |
Semiconductor memory device
Grant 6,618,298 - Honma , et al. September 9, 2 | 2003-09-09 |
Mobile object combination detection apparatus and method
Grant 6,584,211 - Amemiya , et al. June 24, 2 | 2003-06-24 |
Semiconductor device and a method of manufacturing the same
Grant 6,538,331 - Masuda , et al. March 25, 2 | 2003-03-25 |
Semiconductor memory module having double-sided stacked memory chip layout
Grant 6,521,993 - Masayuki , et al. February 18, 2 | 2003-02-18 |
Semiconductor device with elastic structure and wiring
Grant 6,515,371 - Akiyama , et al. February 4, 2 | 2003-02-04 |
Semiconductor device
Grant 6,452,266 - Iwaya , et al. September 17, 2 | 2002-09-17 |
Semiconductor memory module having double-sided stacked memory chip layout
Grant 6,424,030 - Masayuki , et al. July 23, 2 | 2002-07-23 |
Semiconductor memory module having double-sided memory chip layout
Grant 6,262,488 - Masayuki , et al. July 17, 2 | 2001-07-17 |
Semiconductor memory module having double-sided stacked memory chip layout
Grant 5,910,685 - Watanabe , et al. June 8, 1 | 1999-06-08 |
Semiconductor memory module having double-sided stacked memory chip layout
Grant 5,708,298 - Masayuki , et al. January 13, 1 | 1998-01-13 |
Process for manufacturing a stacked integrated circuit package
Grant 5,587,341 - Masayuki , et al. December 24, 1 | 1996-12-24 |
Operational amplifier for stably driving a low impedance load of low power consumption
Grant 5,285,168 - Tomatsu , et al. February 8, 1 | 1994-02-08 |
Lead connections means for stacked tab packaged IC chips
Grant 5,138,438 - Masayuki , et al. August 11, 1 | 1992-08-11 |
Semiconductor integrated circuit device
Grant 4,984,058 - Miyaoka , et al. January 8, 1 | 1991-01-08 |
Semiconductor integrated circuit device and method of manufacturing the same
Grant 4,982,265 - Watanabe , et al. January 1, 1 | 1991-01-01 |
Semiconductor memory device with dual selection circuitry including CMOS and bipolar transistors
Grant 4,961,164 - Miyaoka , et al. October 2, 1 | 1990-10-02 |
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