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Patent applications and USPTO patent grants for Aisaka; Tetsuya.The latest application filed is for "pll frequency synthesizer circuit".
Patent | Date |
---|---|
PLL frequency synthesizer circuit Grant 5,410,571 - Yonekawa , et al. April 25, 1 | 1995-04-25 |
ECL-to-GaAs level converting circuit Grant 5,248,909 - Aoki , et al. September 28, 1 | 1993-09-28 |
Bias voltage generation circuit of ECL level for decreasing power consumption thereof Grant 5,218,238 - Nonaka , et al. June 8, 1 | 1993-06-08 |
Circuit having level converting circuit for converting logic level Grant 5,162,676 - Aoki , et al. November 10, 1 | 1992-11-10 |
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