Aichelmann, Jr.; Frederick J.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Aichelmann, Jr.; Frederick J..The latest application filed is for "fault tolerant memory".
- Aichelmann, Jr.; Frederick J. - Hopewell Junction NY
- Aichelmann, Jr.; Frederick J. - Hopewell Jct. NY
| Patent | Date |
|---|---|
| Fault tolerant memory Grant 5,434,868 - Aichelmann, Jr. , et al. July 18, 1 | 1995-07-18 |
| Fast access memory structure Grant 5,276,846 - Aichelmann, Jr. , et al. January 4, 1 | 1994-01-04 |
| Memory organization with arrays having an alternate data port facility Grant 5,166,903 - Aichelmann, Jr. November 24, 1 | 1992-11-24 |
| On-chip bit reordering structure Grant 4,845,664 - Aichelmann, Jr. , et al. July 4, 1 | 1989-07-04 |
| High speed buffer store arrangement for quick wide transfer of data Grant 4,823,259 - Aichelmann, Jr. , et al. April 18, 1 | 1989-04-18 |
| ECC circuit failure detector/quick word verifier Grant 4,740,968 - Aichelmann, Jr. April 26, 1 | 1988-04-26 |
| Intermediate memory array with a parallel port and a buffered serial port Grant 4,718,039 - Aichelmann, Jr. , et al. January 5, 1 | 1988-01-05 |
| Error correction for multiple bit output chips Grant 4,617,664 - Aichelmann, Jr. , et al. October 14, 1 | 1986-10-14 |
| Error logging memory system for avoiding miscorrection of triple errors Grant 4,604,751 - Aichelmann, Jr. , et al. August 5, 1 | 1986-08-05 |
| Memory address permutation apparatus Grant 4,506,364 - Aichelmann, Jr. , et al. March 19, 1 | 1985-03-19 |
| Method for storing data words in fault tolerant memory to recover uncorrectable errors Grant 4,458,349 - Aichelmann, Jr. , et al. July 3, 1 | 1984-07-03 |
| Recirculating loop memory array having a shift register buffer for parallel fetching and storing Grant 4,388,701 - Aichelmann, Jr. , et al. June 14, 1 | 1983-06-14 |
| Two speed recirculating memory system using partially good components Grant 4,365,318 - Aichelmann, Jr. , et al. December 21, 1 | 1982-12-21 |
| Recirculating loop memory array tester Grant 4,363,124 - Aichelmann, Jr. December 7, 1 | 1982-12-07 |
| LARAM Memory with reordered selection sequence for refresh Grant 4,238,842 - Aichelmann, Jr. December 9, 1 | 1980-12-09 |
| Processor controlled memory refresh Grant 4,172,282 - Aichelmann, Jr. , et al. October 23, 1 | 1979-10-23 |
| Bidirectional serial-parallel-serial charge-coupled device Grant 4,165,539 - Aichelmann, Jr. August 21, 1 | 1979-08-21 |
| Multiplexed and interlaced charge-coupled serial-parallel-serial memory device Grant 4,152,781 - Aichelmann, Jr. May 1, 1 | 1979-05-01 |
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