loadpatents
Patent applications and USPTO patent grants for Agrawal; Om.The latest application filed is for "clock distribution chip".
Patent | Date |
---|---|
Clock distribution chip Grant 8,122,277 - Chandra , et al. February 21, 2 | 2012-02-21 |
Clock distribution chip Grant 8,112,656 - Chandra , et al. February 7, 2 | 2012-02-07 |
Clock distribution chip for generating both zero-delay and non-zero-delay clock signals Grant 7,657,773 - Chandra , et al. February 2, 2 | 2010-02-02 |
Programmable logic device with enhanced logic block architecture Grant 7,573,291 - Agrawal , et al. August 11, 2 | 2009-08-11 |
Programmable logic device with enhanced logic block architecture Grant 7,295,035 - Agrawal , et al. November 13, 2 | 2007-11-13 |
I/O buffer architecture for programmable devices Grant 7,061,269 - Agrawal , et al. June 13, 2 | 2006-06-13 |
Programmable logic device with subroutine stack and random access memory Grant 5,042,004 - Agrawal , et al. August 20, 1 | 1991-08-20 |
Method for designing a control sequencer Grant 4,933,897 - Shankar , et al. June 12, 1 | 1990-06-12 |
Multiple array customizable logic device Grant 4,931,671 - Agrawal June 5, 1 | 1990-06-05 |
Logic controller having programmable logic "and" array using a programmable gray-code counter Grant 4,876,640 - Shankar , et al. October 24, 1 | 1989-10-24 |
Programmable logic cell with flexible clocking and flexible feedback Grant 4,771,285 - Agrawal , et al. September 13, 1 | 1988-09-13 |
Multiple array customizable logic device Grant 4,742,252 - Agrawal May 3, 1 | 1988-05-03 |
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