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name:-0.011246919631958
name:-0.0038418769836426
Agarwal; Sundeep Ram Gopal Patent Filings

Agarwal; Sundeep Ram Gopal

Patent Applications and Registrations

Patent applications and USPTO patent grants for Agarwal; Sundeep Ram Gopal.The latest application filed is for "power gating in stacked die structures".

Company Profile
3.9.1
  • Agarwal; Sundeep Ram Gopal - Hyderabad IN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Power gating in stacked die structures
Grant 11,374,564 - Dubey , et al. June 28, 2
2022-06-28
Yield-centric power gated regulated supply design with programmable leakers
Grant 11,017,822 - Rkc Saraswatula , et al. May 25, 2
2021-05-25
Multi-chip stacked devices
Grant 11,004,833 - Kandala , et al. May 11, 2
2021-05-11
Programmable termination circuits for programmable devices
Grant 10,998,904 - Agarwal , et al. May 4, 2
2021-05-04
Programmable pipeline at interface of hardened blocks
Grant 10,990,555 - Tripathi , et al. April 27, 2
2021-04-27
Softmax circuit
Grant 10,949,498 - Enumula , et al. March 16, 2
2021-03-16
Power gating in stacked die structures
Grant 10,826,492 - Dubey , et al. November 3, 2
2020-11-03
Circuit for and method of transmitting a signal in an integrated circuit device
Grant 10,804,255 - Agarwal , et al. October 13, 2
2020-10-13
Power Gating In Stacked Die Structures
App 20200076424 - Dubey; Prashant ;   et al.
2020-03-05
Master-slave flip-flops and methods of implementing master-slave flip-flops in an integrated circuit
Grant 9,281,807 - Maillard , et al. March 8, 2
2016-03-08

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