Agarwal; Sapan
Patent Applications and Registrations
Patent applications and USPTO patent grants for Agarwal; Sapan.The latest application filed is for "memory access system".
- Agarwal; Sapan - Cambridge MA
- Agarwal; Sapan - Albuquerque NM
- Agarwal; Sapan - Dublin CA
| Patent | Date |
|---|---|
| Two-terminal electronic charge resistance switching device Grant 10,950,790 - Marinella , et al. March 16, 2 | 2021-03-16 |
| Mixed core processor unit Grant 10,776,684 - Agarwal , et al. Sept | 2020-09-15 |
| Memory access system Grant 10,649,663 - James , et al. | 2020-05-12 |
| Ionic floating-gate memory device Grant 10,497,866 - Fuller , et al. De | 2019-12-03 |
| Circuit arrangement and technique for setting matrix values in three-terminal memory cells Grant 10,489,483 - Marinella , et al. Nov | 2019-11-26 |
| Tunable ionic electronic transistor Grant 10,429,343 - Talin , et al. October 1, 2 | 2019-10-01 |
| Memory Access System App 20190034358 - James; Conrad D. ; et al. | 2019-01-31 |
| Compensating for parasitic voltage drops in circuit arrays Grant 10,043,855 - Agarwal , et al. August 7, 2 | 2018-08-07 |
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