| Patent | Date |
|---|
Electrical load with preferential source
App 20070114849 - Falik; Ohad ; et al. | 2007-05-24 |
Adjustable spread spectrum clock generator and a method thereof
App 20040076221 - Refaeli, Moshe ; et al. | 2004-04-22 |
Phase lock loop having a robust bandwidth and a calibration method thereof
Grant 6,570,947 - Zipper , et al. May 27, 2 | 2003-05-27 |
Apparatus and method for dynamic element matching
App 20030085827 - Koifman, Vladimir ; et al. | 2003-05-08 |
Low jitter phase locked loop having a sigma delta modulator and a method thereof
Grant 6,208,211 - Zipper , et al. March 27, 2 | 2001-03-27 |
Digital-to-analog converter with noiseshaping modulator, commutator and plurality of unit converters, and method
Grant 6,028,544 - Zarubinsky , et al. February 22, 2 | 2000-02-22 |
Apparatus providing a substantially equal transconductance ratio and method
Grant 5,966,087 - Koifman , et al. October 12, 1 | 1999-10-12 |
GHZ range frequency divider in CMOS
Grant 5,907,589 - Koifman , et al. May 25, 1 | 1999-05-25 |
Fast start-up circuit
Grant 5,892,381 - Koifman , et al. April 6, 1 | 1999-04-06 |
Analog-to-digital converter using dither and method for converting analog signals to digital signals
Grant 5,889,482 - Zarubinsky , et al. March 30, 1 | 1999-03-30 |
Integrated circuit having CPU core operable for switching between two independent asynchronous clock sources of different frequencies while the CPU continues executing instructions
Grant 5,872,960 - Oz , et al. February 16, 1 | 1999-02-16 |
Low voltage class AB amplifier
Grant 5,825,246 - Koifman , et al. October 20, 1 | 1998-10-20 |
Analog-to-digital converter on CMOS with MOS capacitor
Grant 5,790,063 - Koifman , et al. August 4, 1 | 1998-08-04 |
High frequency amplifier in CMOS
Grant 5,777,516 - Koifman , et al. July 7, 1 | 1998-07-07 |
Electronic circuit for converting a differential signal into a single-ended signal with common mode voltage rejection by resistor network
Grant 5,760,648 - Koifman , et al. June 2, 1 | 1998-06-02 |
Digital-to-analog converter with dynamic matching and bit splitting
Grant 5,760,726 - Koifman , et al. June 2, 1 | 1998-06-02 |
Noise cancelling circuit and arrangement
Grant 5,724,038 - Koifman , et al. March 3, 1 | 1998-03-03 |
Parallel integrated circuit having DSP module and CPU core operable for switching between two independent asynchronous clock sources while the system continues executing instructions
Grant 5,603,017 - Intrater , et al. February 11, 1 | 1997-02-11 |
Integrated data processing system including CPU core and parallel, independently operating DSP module
Grant 5,592,677 - Intrater , et al. January 7, 1 | 1997-01-07 |
Integrated CPU core and parallel, independently operating DSP module and time-critical core priority scheme
Grant 5,590,357 - Intrater , et al. December 31, 1 | 1996-12-31 |
Integrated data processing system having CPU core and parallel independently operating DSP module utilizing successive approximation analog to digital and PWM for parallel disconnect
Grant 5,491,828 - Intrater , et al. February 13, 1 | 1996-02-13 |
Programmable logic array
Grant 4,659,948 - Sunter , et al. April 21, 1 | 1987-04-21 |
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