Patent | Date |
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Thread transition management Grant 11,256,507 - Abernathy , et al. February 22, 2 | 2022-02-22 |
Thread Transition Management App 20190250918 - Abernathy; Christopher M. ;   et al. | 2019-08-15 |
Processor For Avoiding Reduced Performance Using Instruction Metadata To Determine Not To Maintain A Mapping Of A Logical Regist App 20190250913 - Abernathy; Christopher M ;   et al. | 2019-08-15 |
Thread transition management Grant 10,296,339 - Abernathy , et al. | 2019-05-21 |
Processor for avoiding reduced performance using instruction metadata to determine not to maintain a mapping of a logical register to a physical register in a first level register file Grant 10,275,251 - Abernathy , et al. | 2019-04-30 |
Thread Transition Management App 20180349141 - Abernathy; Christopher M. ;   et al. | 2018-12-06 |
Thread transition management Grant 10,055,226 - Abernathy , et al. August 21, 2 | 2018-08-21 |
Bypassing a higher level register file in a processor having a multi-level register file and a set of bypass registers Grant 9,959,121 - Abernathy , et al. May 1, 2 | 2018-05-01 |
Thread Transition Management App 20170300331 - Abernathy; Christopher M. ;   et al. | 2017-10-19 |
Thread transition management Grant 9,703,561 - Abernathy , et al. July 11, 2 | 2017-07-11 |
Active power dissipation detection based on erroneus clock gating equations Grant 9,495,490 - Abernathy , et al. November 15, 2 | 2016-11-15 |
Efficient Usage Of A Multi-level Register File Utilizing A Register File Bypass App 20160154650 - Abernathy; Christopher M. ;   et al. | 2016-06-02 |
Efficient usage of a multi-level register file utilizing a register file bypass Grant 9,286,068 - Abernathy , et al. March 15, 2 | 2016-03-15 |
Instruction tracking system for processors Grant 8,874,880 - Abernathy , et al. October 28, 2 | 2014-10-28 |
Thread Transition Management App 20140258691 - Abernathy; Christopher M. ;   et al. | 2014-09-11 |
Thread transition management Grant 8,725,993 - Abernathy , et al. May 13, 2 | 2014-05-13 |
Efficient Usage Of A Multi-level Register File Utilizing A Register File Bypass App 20140122840 - Abernathy; Christopher M. ;   et al. | 2014-05-01 |
Efficient Usage Of A Register File Mapper And First-level Data Register File App 20140122841 - Abernathy; Christopher M. ;   et al. | 2014-05-01 |
Efficient Usage Of A Register File Mapper Mapping Structure App 20140122842 - Abernathy; Christopher M. ;   et al. | 2014-05-01 |
Multi-level register file supporting multiple threads Grant 8,661,228 - Abernathy , et al. February 25, 2 | 2014-02-25 |
Multi-level register file supporting multiple threads Grant 8,661,227 - Abernathy , et al. February 25, 2 | 2014-02-25 |
Active Power Dissipation Detection Based On Erronous Clock Gating Equations App 20140019780 - Abernathy; Christopher M. ;   et al. | 2014-01-16 |
Register file supporting transactional processing Grant 8,631,223 - Abernathy , et al. January 14, 2 | 2014-01-14 |
Instruction Tracking System For Processors App 20130346731 - Abernathy; Christopher M. ;   et al. | 2013-12-26 |
Thread Transition Management App 20120216004 - Abernathy; Christopher M. ;   et al. | 2012-08-23 |
Multi-level Register File Supporting Multiple Threads App 20120204009 - ABERNATHY; CHRISTOPHER M. ;   et al. | 2012-08-09 |
System and method for double-issue instructions using a dependency matrix Grant 8,239,661 - Abernathy , et al. August 7, 2 | 2012-08-07 |
Issue unit for placing a processor into a gradual slow mode of operation Grant 8,200,946 - Abernathy , et al. June 12, 2 | 2012-06-12 |
Multi-level Register File Supporting Multiple Threads App 20120072700 - ABERNATHY; CHRISTOPHER M. ;   et al. | 2012-03-22 |
System and method for double-issue instructions using a dependency matrix and a side issue queue Grant 8,135,942 - Abernathy , et al. March 13, 2 | 2012-03-13 |
Tracking deallocated load instructions using a dependence matrix Grant 8,099,582 - Abernathy , et al. January 17, 2 | 2012-01-17 |
Instruction Tracking System For Processors App 20110302392 - Abernathy; Christopher M. ;   et al. | 2011-12-08 |
Register File Supporting Transactional Processing App 20110283096 - ABERNATHY; CHRISTOPHER M. ;   et al. | 2011-11-17 |
Method to reduce power consumption of a register file with multi SMT support Grant 8,046,566 - Abernathy , et al. October 25, 2 | 2011-10-25 |
Issuing instructions in-order in an out-of-order processor using false dependencies Grant 8,037,366 - Abernathy , et al. October 11, 2 | 2011-10-11 |
Issuing load-dependent instructions in an issue queue in a processing unit of a data processing system Grant 7,991,979 - Abernathy , et al. August 2, 2 | 2011-08-02 |
Handling data cache misses out-of-order for asynchronous pipelines Grant 7,900,024 - Abernathy , et al. March 1, 2 | 2011-03-01 |
Processor livelock recovery by gradual stalling of instruction processing rate during detection of livelock condition Grant 7,818,544 - Abernathy , et al. October 19, 2 | 2010-10-19 |
Issuing Instructions In-Order in an Out-of-Order Processor Using False Dependencies App 20100251016 - Abernathy; Christopher M. ;   et al. | 2010-09-30 |
Tracking Deallocated Load Instructions Using a Dependence Matrix App 20100250902 - Abernathy; Christopher M. ;   et al. | 2010-09-30 |
Method and system for restoring register mapper states for an out-of-order microprocessor Grant 7,689,812 - Abernathy , et al. March 30, 2 | 2010-03-30 |
System and Method for Issuing Load-Dependent Instructions in an Issue Queue in a Processing Unit of a Data Processing System App 20100077181 - Abernathy; Christopher M. ;   et al. | 2010-03-25 |
System and Method for Double-Issue Instructions Using a Dependency Matrix and a Side Issue Queue App 20100058033 - Abernathy; Christopher M. ;   et al. | 2010-03-04 |
System and Method for Double-Issue Instructions Using a Dependency Matrix App 20100058035 - Abernathy; Christopher M. ;   et al. | 2010-03-04 |
Selectively engaging optional data reduction mechanisms for capturing trace data Grant 7,653,848 - Abernathy , et al. January 26, 2 | 2010-01-26 |
Method to Reduce Power Consumption of a Register File with Multi SMT Support App 20090292892 - Abernathy; Christopher M. ;   et al. | 2009-11-26 |
System and Method for Issuing Load-Dependent Instructions from an Issue Queue in a Processing Unit App 20090113182 - Abernathy; Christopher M. ;   et al. | 2009-04-30 |
Handling Data Cache Misses Out-of-Order for Asynchronous Pipelines App 20090043995 - Abernathy; Christopher M. ;   et al. | 2009-02-12 |
Mechanisms for Placing a Processor into a Gradual Slow Mode of Operation App 20090006817 - Abernathy; Christopher M. ;   et al. | 2009-01-01 |
Issue Unit for Placing a Processor into a Gradual Slow Mode of Operation App 20090006820 - Abernathy; Christopher M. ;   et al. | 2009-01-01 |
Apparatus and method for handling data cache misses out-of-order for asynchronous pipelines Grant 7,461,239 - Abernathy , et al. December 2, 2 | 2008-12-02 |
Issue unit for placing a processor into a gradual slow mode of operation in response to a detected livelock condition within a processor pipeline Grant 7,437,539 - Abernathy , et al. October 14, 2 | 2008-10-14 |
Placing a processor into a gradual slow mode of operation in response to a detected livelock condition within a processor pipeline Grant 7,434,033 - Abernathy , et al. October 7, 2 | 2008-10-07 |
Using a Register File as Either a Rename Buffer or an Architected Register File App 20080244242 - Abernathy; Christopher M. ;   et al. | 2008-10-02 |
Method and System for Restoring Register Mapper States for an Out-Of-Order Microprocessor App 20080195850 - Abernathy; Christopher M. ;   et al. | 2008-08-14 |
Method And System For On-demand Scratch Register Renaming App 20080127197 - ABERNATHY; CHRISTOPHER M. ;   et al. | 2008-05-29 |
Method and system for on-demand scratch register renaming Grant 7,363,469 - Abernathy , et al. April 22, 2 | 2008-04-22 |
System and Method for Selectively Engaging Optional Data Reduction Mechanisms for Capturing Trace Data App 20080016407 - Abernathy; Christopher M. ;   et al. | 2008-01-17 |
System and Method for Streaming High Frequency Trace Data Off-Chip App 20080016408 - Abernathy; Christopher M. ;   et al. | 2008-01-17 |
Issue Unit For Placing A Processor Into A Gradual Slow Mode Of Operation App 20070245129 - Abernathy; Christopher M. ;   et al. | 2007-10-18 |
System And Method For Placing A Processor Into A Gradual Slow Mode Of Operation App 20070245350 - Abernathy; Christopher M. ;   et al. | 2007-10-18 |
Method and system for on-demand scratch register renaming App 20070234011 - Abernathy; Christopher M. ;   et al. | 2007-10-04 |
Apparatus and method for handling data cache misses out-of-order for asynchronous pipelines App 20070180221 - Abernathy; Christopher M. ;   et al. | 2007-08-02 |
Method for dynamically choosing between varying processor error resolutions App 20070088989 - Abernathy; Christopher M. ;   et al. | 2007-04-19 |