Mark For: INTEL EASIC® trademark registration is intended to cover the categories of integrated circuits and semiconductors; programmable integrated circuits; integrated circuit layouts. [all]
Status
2021-07-26 UTC
LIVE REGISTRATION Issued and Active
The trademark application has been registered with the Office.
(Electrical and scientific apparatus) Scientific, nautical, surveying, electric, photographic, cinematographic, optical, weighing, measuring, signaling, checking (supervision), lifesaving and teaching apparatus and instruments; apparatus for recording, transmission or reproduction of sound or images; magnetic data carriers, recording discs; automatic vending machines and mechanisms for coin operated apparatus; cash registers, calculating machines, data processing equipment and computers; fire-extinguishing apparatus.
Filed Use
No
Current Use
Yes
Intent To Use
No
Filed ITU
Yes
44D Filed
No
44E Current
No
66A Current
No
Current Basis
No
No Basis
No
Attorney Name
Katherine M. Basile and Jason E. Garcia
Attorney Docket Number
18-20079-US
Law Office Assigned
L50
Employee Name
BUTTON, JENNIFER JO
Timeline
2018-10-12
Application Filed
2019-01-02
Location: TMEG LAW OFFICE 105 - EXAMINING ATTORNEY ASSIGNED
2019-01-02
Status: Live/Pending
2019-01-02
Transaction Date
2019-02-26
Published
2019-02-26
Published for Opposition
2019-04-02
Date of First Use
2019-09-12
Date of Use In Commerce
2019-11-06
Location: PUBLICATION AND ISSUE SECTION
2019-12-10
Status: Registered. The registration date is used to determine when post-registration maintenance documents are due.
KATHERINE M. BASILE AND JASON E. GARCIA REED SMITH LLP P.O. BOX 488 PITTSBURGH, PA 15230
Good, Services, and Codes
IC 009. US 021 023 026 036 038. G & S: integrated circuits and semiconductors; programmable integrated circuits; integrated circuit layouts. FIRST USE: 20190402. FIRST USE IN COMMERCE: 20190912
International Codes:
9
U.S. Codes:
021,023,026,036,038
Type Code
Type
PM0001
INTEL E ASIC
GS0091
integrated circuits and semiconductors; programmable integrated circuits; integrated circuit layouts
Trademark Filing History
Description
Date
Proceeding Number
REGISTERED-PRINCIPAL REGISTER
2019-12-10
NOTICE OF ACCEPTANCE OF STATEMENT OF USE E-MAILED
2019-11-07
ALLOWED PRINCIPAL REGISTER - SOU ACCEPTED
2019-11-06
STATEMENT OF USE PROCESSING COMPLETE
2019-11-05
71034
CASE ASSIGNED TO INTENT TO USE PARALEGAL
2019-11-05
71034
USE AMENDMENT FILED
2019-10-23
71034
TEAS STATEMENT OF USE RECEIVED
2019-10-23
NOA E-MAILED - SOU REQUIRED FROM APPLICANT
2019-04-23
PUBLISHED FOR OPPOSITION
2019-02-26
OFFICIAL GAZETTE PUBLICATION CONFIRMATION E-MAILED
2019-02-26
NOTIFICATION OF NOTICE OF PUBLICATION E-MAILED
2019-02-06
LAW OFFICE PUBLICATION REVIEW COMPLETED
2019-01-19
69712
ASSIGNED TO LIE
2019-01-18
69712
APPROVED FOR PUB - PRINCIPAL REGISTER
2019-01-02
NOTIFICATION OF NON-FINAL ACTION E-MAILED
2018-11-23
6325
NON-FINAL ACTION WRITTEN
2018-11-23
81139
NON-FINAL ACTION E-MAILED
2018-11-23
6325
ASSIGNED TO EXAMINER
2018-11-21
81139
NEW APPLICATION OFFICE SUPPLIED DATA ENTERED IN TRAM
2018-10-24
NEW APPLICATION ENTERED IN TRAM
2018-10-16
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